OFC/NFOEC 2011, LOS ANGELES, USA: Vitesse Semiconductor Corp., a leading provider of advanced IC solutions for Carrier and Enterprise networks, continues its focus on easing the transition to Carrier Ethernet in core and metropolitan networks by being the first to combine both the stringent precision packet timing protocol IEEE 1588 v2 and the advanced performance monitoring Y.1731 standard into physical layer devices (PHYs).
Vitesse's years of experience in providing ICs for the carrier market and participation in standards bodies such as Metro Ethernet Forum (MEF), IEEE and the International Telecommunications Union (ITU) uniquely enables the Company to identify the needs of the market and efficiently combine the detailed specifications of these technologies.
By focusing on the integration of 1588v2 and Y.1731 at the PHY level, Vitesse is able to provide today’s Carrier Ethernet-based networks with accurate timing and failover performance previously only found in traditional TDM networks. Integrating both capabilities also improves system efficiency and lowers network costs by avoiding potential packet retransmission requests. Further, service providers can now monitor services delivery in real time through the timing and performance statistics within the Operations Administration & Maintenance (OAM) function.
The dual 1588v2/Y.1731 technology offering will be used in the industry’s most comprehensive PHY product portfolio. These devices are optimized for copper and fiber media, covering applications from Carrier Ethernet (LAN/WAN) to Optical Packet Transport (OTN) and speeds from 100Mbps to 100G.
In addition to being the first PHY portfolio in the industry that supports both IEEE1588v2 and Y.1731 precision time stamping, it also delivers the industry’s most advanced packet protocol support including IPv4 and IPv6, IP/MPLS, Pseudowire, and MPLS-Transport Protocol, supporting a rich mix of services in the network node. These PHY devices are targeted at mobile backhaul, business services, and industrial applications.
The first two products in this portfolio, the VSC8487-15 and VSC8488-15 10G PHYs, are being introduced at OFC/NFOEC Expo in Los Angeles.
“By enabling 1588v2 and Y.1731 time stamping closer to the line interface, Vitesse physical layer family of devices will improve the accuracy and reduce complexity of these protocol implementations in networking equipment,” said Martin Nuss, vice president of strategy and technology at Vitesse. “This will allow our customers to design or upgrade systems to meet stringent timing and performance monitoring standards for applications like mobile backhaul.”
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