NXP Semiconductors India has developed the PNX4902, an ultra low-cost GSM/GPRS single chip, which was announced this February. The highlight -- the entire analog and RF work done has been in Bangalore! You might wonder what's so unique about this!
Well, let's start with what is tough about RF CMOS in single chip! CMOS is primarily a digital process. The analog circuit design in CMOS is tough, and the RF circuit design in CMOS is even tougher. Now, the co-existence of RF CMOS circuits with noisy digital in a single chip was (and is) considered the holy grail of chip design.
Next, cellular standards (such as GSM, EDGE) and specs are much tougher than other comparable standards like FM, Bluetooth, etc. Also, some key cellular parameters like RX sensitivity become tougher for single chips aimed at emerging markets. Especially, we all know that base stations are sparse in rural areas. Taking all of these as a whole -- RF design in presence of digital noise is the biggest challenge in a single chip!
Factors enabling single chip design
There are said to be three factors. One, RF CMOS is the high quality analog/RF design in CMOS. The high-performance RF blocks like LNA, mixers, etc., used to be the domain of BiCMOS, a higher cost technology. Next, fine-line CMOS (0.18mm and lower) provide high fT and lower noise.
Two, there are new architectures that minimize analog signal processing. Chip designers to convert the analog signal to digital -- so they might as well do it early -- analog-to-digital conversion at the IF, instead of at DC. There's also a need to move the final down-conversion and filtering into digital domain.
Three, the use of DSP to calibrate the analog performance. Things like temperature and process sensitivities in analog circuits need adjustments. Also, the digital engines can provide the ability to 'lock-in' the performance. Finally, a strong 'engineering culture' is a MUST to execute on complex chips.
Factors enabling AeroFone single chip design
NXP had acquired Silicon Labs Wireless group in 2007. Silicon Labs was a leader in RF CMOS, and so it also acquired numerous patents and trade secrets. Trade secrets for integration of RF CMOS circuits with noisy digital provide an edge over competitors as the integration intensifies.
Thereafter, NXP went on to form the NXP India single-chip design team. As single chip products are designed for emerging economies, NXP India invested heavily to develop the design expertise in Bangalore. The seed group of chip leads and system leads relocated from USA to India to start an analog/RF competency center for developing highly integrated chips.
The NXP India single chip design team has the vision to be the best center of competence in architecture and design of highly integrated circuits (ICs) for emerging market products. It is building the best analog/RF group in India.
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